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- [LTspice] 14. Circuit (3) Differential Pair with Active Loads Table of Contents 1. Introduction 2. Differential Pair Operation and Small-Signal Model 3. Impact of Replacing the Ideal Tail Current Source with a Current Mirror 7.
- [LTspice] 13. Circuit (2) Differential Pair with Resistive Loads Table of Contents 1. Introduction 2. Differential Pair Operation and Small-Signal Model 3. Impact of Replacing the Ideal Tail Current Source with a Current Mirror Appendix Listing 3.1 SPICE model
- [LTspice] 12. Circuit (1) Current Mirror Table of Contents 1. Introduction 2. DC Analysis of the Reference Stage 3. With its gate and drain shorted, the nMOSFET always operates in saturation mode, because VDS is greater
- [LTspice] 4. MOSFET (1) SPICE Model Level 1 — DC Currents Table of Contents 1. SPICE Model — Level 1 (Shichman-Hodges) 2. (See Table 2 for a detailed list of options.)
- [LTspice] 9. MOSFET (6) SPICE Model Level 2 — Capacitances Table of Contents 3. Capacitances Equations AC Analysis 3. Capacitances ■ Equations For the level-2 model, the junction capacitances associated with the bulk—CBS
- [LTspice] 8. MOSFET (5) SPICE Model Level 2 — DC Currents Table of Contents 1. SPICE Model — Level 2 2. the following additional phenomena: The depletion layer between the channel and substrate is treated with